1. Field of the Invention
This invention is related to computer systems and, more particularly, to prefetch mechanisms within computer systems.
2. Description of the Related Art
Modern microprocessors are demanding increasing memory bandwidth to support the increased performance achievable by the microprocessors. Increasing clock frequencies (i.e. shortening clock cycles) employed by the microprocessors allow for more data and instructions to be processed per second, thereby increasing bandwidth requirements. Furthermore, modern microprocessor microarchitectures are improving the efficiency at which the microprocessor can process data and instructions. Bandwidth requirements are increased even further due to the improved processing efficiency.
Computer systems typically have a relatively large, relatively slow main memory. Typically, multiple dynamic random access memory (DRAM) modules comprise the main memory system. The large main memory provides storage for a large number of instructions and/or a large amount of data for use by the microprocessor, providing faster access to the instructions and/or data then may be achieved from a disk storage, for example. However, the access times of modern DRAMs are significantly longer than the clock cycle length of modern microprocessors. The memory access time for each set of bytes being transferred to the microprocessor is therefore long. Accordingly, the main memory system is not a high bandwidth system. Microprocessor performance may suffer due to a lack of available memory bandwidth.
In order to increase performance, microprocessors may employ prefetching to "guess" which data will be requested by the program being executed by the microprocessor in the future. If the guess is correct, the delay of fetching the data from memory has already occurred when the data is requested (i.e. the requested data may be available within the microprocessor). The microprocessor may employ a cache, for example, and the data may be prefetched from memory into the cache. The term prefetch, as used herein, refers to transferring data into a microprocessor prior to a request for the data being generated via execution of an instruction within the microprocessor. Generally, prefetch algorithms are based upon the pattern of accesses which have been performed in response to the program being executed.
Unfortunately, prefetch operations compete for bandwidth with fetch operations (i.e. operations performed directly in response to instructions currently being executed by the microprocessor). Since bandwidth to the memory system is already taxed by the fetch operation traffic, prefetch operations may worsen the problem. Still further, in multiprocessor systems, bandwidth occupied by prefetch operations performed by one microprocessor may interfere with fetch operations from another microprocessor.